perfmon2: pfmon dual-core Itanium 2 processor documentation
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Pfmon Itanium 2 processor documentation

This page describes the dual-core Itanium 2 (Montecito) processor specific features of pfmon.

This page is under construction

Table of contents for dual-core Itanium 2 processor
  1. Introduction
  2. Command line options
  3. Event thresholds
  4. Opcode matching
    1. Options
    2. Events
    3. Basic example
    4. Constraints
  5. Event address registers (EARs)
  6. Execution Trace buffer (ETB)
    1. Introduction
    2. Some examples
    3. Limitations
  7. Address range restrictions
    1. Introduction
    2. Dual-core Itanium 2 processor limitations
    3. Privilege level mask
    4. Inverting code ranges
    5. Examples
    6. The checkpoint-func option
  8. The --insecure and --dont-start options
  9. Interrupted-triggered execution
  10. The dear-inst sampling module
  11. References
1. Introduction

Pfmon provides access to most of the dual-core Itanium2 PMU specific features. This includes:

  • 12 counters
  • Event Address Registers (Data & Code & ALAT)
  • Opcode matching
  • Address range restrictions (Data & Code) with fine mode and inverse code range
  • Execution Trace Buffer (ETB)
  • Event thresholds
  • rum/sum control at the user level
  • exclude/include interrupt triggered execution
2. Command line options

The dual-core Itanium2 processor specific options of pfmon are as follows:

--event-thresholds=thr1,thr2,... set event thresholds (no space)
--opc-match32=[mifb]:match:mask set opcode match for pmc8
--opc-match34=[mifb]:match:mask set opcode match for pmc9
--etb-tm-tk capture taken IA-64 branches only
--etb-tm-ntk capture not taken IA-64 branches only
--etb-ptm-correct capture branch if target predicted correctly
--etb-ptm-incorrectcapture branch if target is mispredicted
--etb-ppm-correct capture branch if path is predicted correctly
--etb-ppm-incorrectcapture branch if path is mispredicted
--etb-brt-iprelcapture IP-relative branches only
--etb-brt-retcapture return branches only
--etb-brt-indcapture non-return indirect branches only
--irange=start-endspecify an instruction address range constraint
--drange=start-endspecify a data address range constraint
--checkpoint-func=addra bundle address to use as checkpoint
--inverse-irangeinverse instruction range restriction
--insecureallow rum/sum/read(pmd) at user level
--excl-intrexclude interrupt triggered execution
--incl-intrinclude only interrupt triggered execution
--irange-demand-fetchLimit irange to demand fetched cache lines for specific prefetch events
--irange-prefetch-matchLimit irange to explicitly prefetched lines for specific prefetch events